Design of Very High-Frequency Multirate Switched-Capacitor by Ben U Seng Pan, Rui Paulo da Silva Martins, Jose de

By Ben U Seng Pan, Rui Paulo da Silva Martins, Jose de Albuquerque Epifanio da Franca

Layout of Very High-Frequency Multirate Switched-Capacitor Circuits provides the idea and the corresponding CMOS implementation of the unconventional multirate sampled-data analog interpolation procedure which has its nice power on very high-frequency analog frond-end filtering as a result of its inherent twin benefit of decreasing the rate of data-converters and DSP center including the specification rest of the submit continuous-time filtering. this system thoroughly gets rid of the normal phenomenon of sampled-and-hold frequency-shaping on the decrease enter sampling expense. additionally, to be able to take on actual IC imperfections at very excessive frequency, the cutting-edge circuit layout and format options for high-speed Switched-Capacitor (SC) circuits are comprehensively mentioned: -Optimum circuit structure tradeoff analysis-Simple velocity and tool trade-off research of energetic elements-High-order filtering reaction accuracy with admire to capacitor-ratio mismatches-Time-interleaved influence with appreciate to achieve and offset mismatch-Time-interleaved impact with admire to timing-skew and random jitter with non-uniformly holding-Stage noise research and allocation scheme-Substrate and provide noise reduction-Gain-and offset-compensation techniques-High-bandwidth low-power amplifier layout and layout-Very low timing-skew multiphase new release tailored optimal layout examples in CMOS are offered. the 1st one achieves a 3-stage 8-fold SC interpolating filter out with 5.5MHz bandwidth and 108MHz output sampling expense for a NTSC/PAL CCIR 601 electronic video at three V. one other is a 15-tap 57MHz SC FIR bandpass interpolating clear out with 4-fold sampling expense raise to 320MHz and the first-time embedded frequency band up-translation for DDFS method at 2.5V. The corresponding chip prototype achieves to this point the top working frequency, maximum filter out order and maximum heart frequency with maximum dynamic diversity less than the bottom provide voltage in comparison to the formerly pronounced high-frequency SC filters in CMOS.

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1) where X e ( e jω ) and X (e jωL ) , are, respectively, the spectrum of the upsampled and the original samples, and H ( e jω ) is the ideal frequency response of the interpolation filter (gain = L, cutoff frequency ωc = π /L). 2) In the (sampled-data) analog case, the exact interpolation (as in the above digital case) is not possible due to the input S/H signal, then it must be described by the conventional analog interpolation model in Figure 2-1(a). The analog interpolating filter, which can be analyzed as a discrete-time processor operating at Lfs with an output hold at Lfs, will sample and process the input signal at Lfs (thus having L successive equal-value samples owing to the constant-held input within a full sampling period 1/fs) and its operation is depicted in Figure 2-1(b), both in time and frequency domains.

Lfs Passband gain-loss and roll-off Simplified LP AIF response O/P higher-rate S/H effect fs 2fs ... ... Lfs (b) Figure 1-4. (a) Baseband (b) Frequency-translated interpolation filtering Chapter 1: Introduction 7 It is worth to point out that the wanted signal band will be distorted by the inherent Sample-and-Hold (S/H) filtering shaping effect at the lower sampling rate from the DAC output. Especially for the wideband or the frequency-translated operation, the interested signal band will be seriously distorted by such shaping effect and will not be easy to recover through the traditional compensation either in the DSP or the CT reconstruction filter.

166-176, Mar. 1994. 6] R. Baschirotto, “Low-voltage analog filters,” IEEE Trans. 827-840, Nov. 1995. 1999. D. Dissertation, Instituto Superior Técnico, Portugal, 1999. 132-137, Apr. 2001. Macbeth, “Switched-Currents – A new technique for analog sampled-data signal processing,” in Proc. 1584-1587, May 1989. Battersby, Switched-Currents: an Analogue Technique for Digital Technology, Peter Peregrinus Ltd, 1993. Valencia, “SC circuits: state of the art compared to SI techniques,” in Proc. 1231-4, May 1993.

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